1. Field of the Invention
The present invention relates to a sequence control system which uses a computer, and more particularly to an input/output (I/O) processor having a reduced sequence cycle and an improved input/output response.
2. Description of the Prior Art
A sequence control system for controlling a number of equipments has been known as a programmable sequence controller which uses a microcomputer. An example of such controller is shown in FIG. 1.
In FIG. 1, a sequence processing procedure is written by a user in a user program memory 1. A CPU 3 sequentially sends addresses for the user program memory 1 to a program counter 2 so that a desired sequence processing procedure is read from the user program memory 1 to a memory data bus b. The data format thus sequentially read to the memory data bus b is shown in FIG. 2. It comprises an operation code field 100 in which the sequence processing procedure is stored and an operand field 101 in which an object number to be processed is stored. The operand field 101 of the memory data is supplied to an I/O controller 4, which designates the controlled object corresponding to the address designated by the operand field and reads therefrom and writes data therein through an input unit 6 and an output unit 7 which are interfaces to external. On the other hand, the operation code field 100 of the memory data is supplied to the CPU 3 and processing corresponding to the operation code is executed. The data of the corresponding controlled object is read or written through the I/O controller 4 as required.
In such a programmable sequence controller, the CPU 3 usually operates in a process flow shown in FIG. 3.
When the programmable sequence controller is powered on (60), the CPU 3 carries out initial processing (61) including checks to determine validity of the user-written program, and then it starts processing.
In the processing, the program counter which points to the address of the user program is set to "0" (62) so that the user program is started from the beginning, an instruction is fetched (63) and executed (64). Thus, one step of operation is completed. The program counter is incremented (65) to execute the next step, and the next instruction is fetched. When the program counter is incremented, whether the instruction is the last one or not is checked (66), and if it is not the last one, the process returns to the step 63. If it is the last one, final processing (67) to be described later is carried out and the program counter is set to "0" (62) so that the program is executed from the beginning.
Thus, the programmable sequence controller sequentially and cyclically executes the user-written program. FIG. 4 illustrates this. One scan time (cyclic time) consists of a series of instruction processing (50) and final processing (51), and the instruction processing (50) is aggregation of one-step processings (500).
One of the important specifications required for the programmable sequence controller is an I/O response. It is a big problem to assure a high I/O response speed. If the response speed is high, a higher response to the data from the controlled object is assured and a control command is more rapidly issued as a result, control precision is improved and the types and number of the controlled machines can be increased.
In the prior art programmable sequence controller, the following approaches A and B have been adapted.
A. The total scan time is reduced so that the response speed is increased.
In this approach, as shown in FIG. 5, an I/O image memory 41 is provided in the I/O controller 4, and the processing by the CPU 3 in each scan time is carried out in a manner shown in FIG. 6, in which the content of the final processing (51) is exchanged between an external device and the image memory 41 through the input unit 6 and the output unit 7. On the other hand, the content of the instruction processing (50) is the aggregation (500) of the one-step processings (63), (64), (65), and the I/O data are read and written only between the image memory 41 and the CPU 3. In the approach A, the data exchange with the external devices through the input unit 6 and the output unit 7 is carried out in the final processing (51) collectively for several data, and in the processing of those data, the image memory 41 is sequentially accessed. As a result, the time required for each step is reduced, the total scan time is reduced and the response speed is increased.
The reason for the reduction of the scan time is explained below.
As shown in FIG. 7(a), units 1-4 which include the CPU 3 is usually physically spaced from the input unit 6 and the output unit 7 and, they are coupled by a relatively long cable. Accordingly, the noise environment is bad. Therefore, if the CPU 3 without the image memory 41 accesses the data one by one to the external device, it is necessary that the time from the output of the address to the read or write time of the data (access time) is sufficiently long as shown in FIG. 10(c) in order to avoid the influence of the noise. As a result, the long access time is required for each step and the sum of them appears in one scan time. Thus, the total scan time is long.
The program of the programmable sequence controller is usually written in a manner shown in FIG. 8(a) and executed in a manner shown in FIG. 8(b). The sequence controller has many external inputs/outputs, and it often has more than 256 inputs/outputs. Accordingly, each time they appear in the sequence program, the access times therefor are added.
In the approach A, the external inputs/outputs are not transferred one by one but they are transferred collectively for a plurality of (usually 16) inputs/outputs in the final processing (51). Accordingly, the total time is much shorter than the sum of the access times and the overall scan time is reduced.
However, in the approach A, the frequency of control to the external devices cannot be shorter than one scan time. In this approach, the external inputs are collectively read and processed, and then the results are collectively outputted. As a result, the response frequency is not shorter than one scan time. This may be an unacceptable shortcoming to a particular controlled object and therefore the range of application of approach A is narrow.
B. One instruction is executed a plurality of times in one scan time.
This approach is a contrast to the approach A. The I/O data are read and written when each instruction is executed. In this approach, an output instruction may be written immediately after an input instruction has been executed, and several such instructions are repeatedly written in the program. As a result, an apparent scan time is reduced and the I/O response is improved.
However, in the approach B, since one instruction is executed a plurality of times in one scan time, the total number of steps increases and the total scan time increases.
The programmable sequence controller by the approach B is disclosed in JP-A-No. 58-121405, published on 7/19/1983.